AI in semiconductor manufacturing works in two layers. Classical machine learning on sensor data, wafer maps and images handles defect classification, virtual metrology and fault detection, while large language models and agents handle the text that surrounds every excursion: alarm summaries, 8D and failure analysis reports, equipment manuals, maintenance logs and verification code. Because process recipes and design IP are crown jewels, and some of that data falls under US export controls, most fabs keep the language layer on servers they control.
Two kinds of AI in the fab, and why buyers mix them up
Fabs have used machine learning for more than a decade. KLA describes image based defect classification built on machine learning in its inspection and review systems, and Micron says its deep learning ADC sorts millions of flaws a year. Virtual metrology models that predict film thickness or etch depth from chamber sensor data have appeared in IEEE journals for well over a decade. None of this is generative AI, and it does not need to be.
What changed after 2023 is that language models became good enough to read and write engineering text. A fab produces far more text than most outsiders expect: shift logs, alarm comments, preventive maintenance records, tool vendor manuals, process specifications, change requests, 8D reports, failure analysis reports and customer complaints. Engineers spend hours searching that material during every excursion.
Vendor pitches often blur the two. A buyer should ask of every proposed use case whether the input is a signal or a document. Signals go to statistical and ML models that can be validated against measured outcomes. Documents go to language models with retrieval, citations and a human reviewer.
| Question | Classical ML and computer vision | LLMs and agents |
|---|---|---|
| Typical input | FDC traces, SPC charts, wafer maps, SEM and optical images, parametric test data | Reports, manuals, logs, specs, emails, RTL and scripts |
| Typical output | A class, a predicted value, an anomaly score | A summary, a draft, an answer with citations, generated code |
| How you validate it | Accuracy against labelled or measured ground truth | Engineer review, citation checks, regression tests on known cases |
| Where it fails badly | Drift after a chamber clean or recipe change | Confident answers without a source, or the wrong revision of a document |
| Who owns it in most fabs | Yield, metrology and data science teams | Process, equipment, quality and design engineering |
Matching each fab problem to the right tool
The table below sorts common requests by the tool that should do the work. Where both appear, the ML model produces the number and the language model explains it in the format an engineer or customer needs.
| Fab problem | Right tool | Role of the language model |
|---|---|---|
| Classifying defects from inspection images | Deep learning ADC on the inspection platform | None for classification; can summarise defect pareto trends for the review meeting |
| Predicting metrology results between measurements | Virtual metrology regression models | None for the prediction; can draft the change notice when a model is retrained |
| Detecting chamber faults in real time | FDC with statistical or ML limits | Summarises the alarm history and links similar past events |
| Wafer map pattern recognition | CNN or clustering models | Matches the recognised signature to past 8D reports |
| Root-causing an excursion | Engineers with data tools | Collects evidence, drafts the timeline and 8D sections |
| Answering “how do we clear this interlock” | Not ML | Retrieval over manuals and PM logs, with citations |
| Writing assertions for a new block | Not ML | Generates candidate SVA for engineer review |
Yield and excursion analysis assistants
An excursion starts with a number: a control chart violation, a fault detection alarm or a yield drop at sort. What follows is mostly reading. The engineer on call checks which tools and chambers the affected lots passed through, reads the alarm comments, looks for maintenance done that week and searches the archive for anything similar.
A language model assistant can do the reading faster. Given read access to the alarm system export, the lot history and the 8D archive, it can produce a first summary: which alarms fired, on which tools, what the shift log says, which past excursions share the same tool and symptom, and what containment those teams used. It cites each statement so the engineer can check it.
The ASQ describes the 8D method as eight disciplines from team formation to recognising the team, with an initial planning step before them. Each discipline produces text that a model can draft from evidence: the problem description in D2, the containment record in D3, the root cause narrative in D4. The engineer still decides what the root cause is. SK hynix said in September 2026 that its AI will analyse line anomalies and suggest causes and countermeasures while people make the final decision, which is the division of labour most fabs will want.
Equipment maintenance knowledge from manuals and PM logs
Equipment engineering is where a document assistant pays back fastest. Tool vendor manuals run to thousands of pages, preventive maintenance procedures are revised often, and the most useful knowledge sits in free-text comments that technicians wrote after a difficult repair.
A retrieval assistant indexed on manuals, PM procedures, work order history and service bulletins can answer questions such as “what was done the last three times chamber B on this etcher failed its leak check” with links to the source records. It can draft a PM checklist update when a vendor bulletin changes a torque value, for an equipment engineer to approve. The maintenance support use case and the predictive maintenance agent describe the same pattern for discrete manufacturing plants.
Two cautions apply. Vendor manuals are usually licensed under confidentiality terms, so check the agreement before indexing them anywhere outside your network. And permissions matter: a technician from one bay should not see a joint development partner’s tool documentation through a shared index.
Recipe, process and failure analysis documentation
Process documentation is the most sensitive text in the fab. Recipes, process specifications and process change requests encode years of development, and at advanced nodes parts of them may be export controlled technology. They are also the documents engineers search most often.
Language models help here in three ways:
- Change requests. Draft the change description, the risk assessment and the qualification plan from a template, with the affected specs listed.
- Specification search. Answer “which revision of the clean spec applies to this route” with the controlling document cited, rather than a paraphrase from memory.
- Failure analysis reports. Turn the FA engineer’s notes, cross-section image captions and measurement tables into a structured report, keeping the analysis and conclusions in the engineer’s words.
The engineering knowledge use case covers the retrieval side, and the quality and defect analysis use case covers how drafted findings move through review.
Generative AI for semiconductor design and verification
Chip design is the area where generative AI moved fastest in 2025 and 2026, and the three large EDA vendors now describe assistants and agents on their own sites. The table summarises what each says its tools do. It is a description of vendor claims, not a test.
| Vendor | Tool | What the vendor says it does |
|---|---|---|
| Synopsys | Synopsys.ai Copilot | Answers tool and flow questions, generates scripts, formal assertions and RTL |
| Synopsys | VSO.ai | Targets coverage closure and cuts redundant regression runs |
| Synopsys | Verification AgentEngineer | Agentic flow from specification through test planning, testbench, coverage closure and root cause analysis |
| Cadence | ChipStack AI Super Agent | Generates RTL, SVA proved in Jasper, UVM sequences and coverage, and triages failures with proposed fixes |
| Cadence | Verisium | Raises coverage and speeds up root cause analysis |
| Siemens | Questa One | Generative AI for SVA property generation and lint with auto-correction |
| Siemens | Questa One Agentic Toolkit and Fuse EDA AI Agent | Agents for RTL, lint, CDC, verification planning and debug, announced in early access in 2026 |
For a buyer, the questions are practical. Where does the model run: on your compute farm, in the vendor’s cloud, or with a third-party model provider behind it? Which of your files does the agent read, and are prompts and outputs retained? Can the assistant reach your internal design guidelines, past bug databases and coding standards, or only the vendor’s documentation?
Many design teams use the EDA vendor tools inside the flow and add a separate private assistant for everything around it: searching internal specifications, summarising bug trackers, explaining legacy RTL to a new engineer and drafting verification plans from a product requirements document. That second assistant needs the same protection as the RTL itself.
AI in semiconductor testing and customer returns
Test engineering has used statistics and machine learning for outlier detection and adaptive test for years. Synopsys describes TSO.ai as an AI application for reducing ATPG pattern counts. These are numeric problems with measurable outcomes, and they belong with the test engineers who can validate them.
The language work around test is still large. A test program release note, a bin pareto review, a correlation study between two testers and a guard band change all need writing and review. An assistant can draft them from the data tables and previous examples, and can answer questions about why a test was added by reading the change history.
Customer quality returns are a strong fit for an agent. When an RMA arrives, someone has to read the customer complaint, find the lot genealogy, collect the test and FA results, check for similar returns and write an 8D response on the customer’s deadline. A governed agent can assemble the evidence package and draft each discipline, with a quality engineer editing and approving the response before it leaves the company. The draft never goes to the customer without that approval.
Why process recipes and design IP push AI on-premises
Three forces push the language layer onto servers the fab controls: trade secrets, export controls and fab network security.
Recipes and RTL are trade secrets
A recipe, a design rule manual or a block of RTL is worth more than most of the hardware in the building. Joint development agreements with equipment makers and customers often restrict where that data may be stored. Sending it to a public AI service, even one with sound contractual terms, adds a party to every one of those agreements.
US export controls on semiconductor items
The US Bureau of Industry and Security has tightened controls on advanced computing and semiconductor manufacturing items in several rounds. Dates matter because several rules are still moving:
| Rule | Published | What it changed |
|---|---|---|
| Advanced computing and semiconductor manufacturing interim final rule, 87 FR 62186 | 13 October 2022 | Controls on advanced chips and certain manufacturing equipment, end-use controls for fabs in China |
| Semiconductor manufacturing items rule, 88 FR 73424 | 25 October 2023 | Moved equipment controls into expanded ECCNs 3B001 and 3B002 |
| SME and HBM rule, 89 FR 96790 | 5 December 2024 | Added HBM controls, new foreign direct product rules and ECCN 3B993 |
| Affiliates rule, 90 FR 47201 | 30 September 2025 | Extended Entity List restrictions to affiliates owned 50 percent or more |
| Suspension of the affiliates rule, 90 FR 50857 | 12 November 2025 | Suspended it from 10 November 2025 to 9 November 2026 |
As of 22 October 2026 no Federal Register notice had extended that suspension, so the affiliates rule is due to apply again on 10 November 2026. Check the status on the day you decide.
For AI, the important rule is older. Under 15 CFR 734.13(b), releasing controlled technology or source code to a foreign person inside the United States is a deemed export to that person’s country. A retrieval index built from process documents can contain controlled technology. So can a prompt that pastes a recipe, and so can the logs that store it. If an AI provider’s support staff or subprocessors outside the country can reach that data, your export compliance team needs to review it before anyone uploads a document.
Fab network security under SEMI E187, E188 and E191
SEMI published E187, the specification for cybersecurity of fab equipment, in January 2022, setting a baseline for operating systems, network security, endpoint protection and monitoring on equipment computers. E188, on malware-free equipment integration, followed in 2022 and covers installation, upgrades and removable media. E191, published in late 2024, asks networked devices to report their cybersecurity status. Together they treat the tool network as a segmented zone. An AI service that needs internet access from inside that zone works against the design. A model served in the fab’s own data centre, reading copies of data exported from the tool network, fits it.
A governed architecture for agentic AI in the fab
A workable design keeps the existing ML systems where they are and adds the language layer beside them:
- Data stays in place. FDC, SPC, MES and the yield system keep their own models. The AI layer reads exports or calls read-only APIs, never the tool network directly.
- Local models. Open-weight models run on GPU servers in the fab or corporate data centre. External model APIs are switched off for any agent that touches recipes, design data or customer data.
- Permission-aware retrieval. The index carries the access rules of each source, so a contractor cannot retrieve a JDA partner’s documents and a design engineer on one program cannot see another program’s specs.
- Read tools first, write tools later. Agents start with read access and drafting. Opening a work order, putting a lot on hold or changing a recipe requires a human approval step, and some actions should never be delegated.
- Audit trail. Every prompt, retrieved passage, tool call and output is logged with the user and model version, so a quality auditor or export compliance reviewer can reconstruct what the agent saw.
- Change control for models. A model update is a software change. Test it against a set of known excursions and FA reports before release, as you would any engineering tool.
For sites that run fully disconnected, the guide to air-gapped AI covers offline model transfer and updates. The plant-level guide to on-premises AI in manufacturing covers OT network zoning in more detail.
How VDF AI fits semiconductor engineering teams
VDF AI is software that a fab installs on its own servers, on-premises, in a private cloud or fully air-gapped. The models, retrieval indexes, conversation history and audit logs stay inside that environment, so recipes, RTL and customer return data never reach an outside model provider. VDF AI holds no certification of its own; the deployment falls under the fab’s own security controls and export compliance review.
The excursion and RMA workflows above map onto governed agents and multi-agent networks. An agent with read tools assembles the alarm history, lot genealogy and similar 8D cases, drafts the report and stops at a human approval node before anything is sent or filed. Retrieval is filtered by each user’s permissions in the source systems, and every turn records the identity, model version, retrieved passages and tool calls. VDF AI Router keeps requests on registered local endpoints such as vLLM or Ollama, and its air-gap mode removes every external route.
On-premises deployments sign users in with Microsoft Entra ID single sign-on and map Entra security groups to roles; other identity providers connect through an SSO-aware reverse proxy. A deployment can start with a three-month platform trial. For the wider picture, see the manufacturing solution page, the quality copilot playbook and the quality inspection agent.
This guide describes regulations for planning purposes and is not legal advice.
Sources
- BIS interim final rule on advanced computing and semiconductor manufacturing items, 87 FR 62186 (13 October 2022)
- BIS rule on export controls for semiconductor manufacturing items, 88 FR 73424 (25 October 2023)
- BIS rule on foreign direct product rules, SME and HBM, 89 FR 96790 (5 December 2024)
- BIS affiliates rule, 90 FR 47201 (30 September 2025)
- BIS suspension of the affiliates rule, 90 FR 50857 (12 November 2025)
- 15 CFR 734.13, the EAR definition of export including deemed exports
- SEMI announcement of E187, cybersecurity of fab equipment (January 2022)
- SEMI Standards Watch on E187 and E188 (March 2022)
- SEMI Standards Watch on E191 device status reporting (December 2024)
- Synopsys generative AI and Synopsys.ai Copilot
- Synopsys agentic AI and Verification AgentEngineer
- Synopsys VSO.ai for verification coverage
- Cadence ChipStack AI Super Agent product brief
- Siemens announcement of Questa One (May 2025)
- Siemens Questa One Agentic Toolkit (February 2026)
- KLA defect inspection and review, including machine learning classification
- Micron on deep learning ADC in its fabs
- Lynn, Ringwood and MacGearailt, virtual metrology models for plasma etch, IEEE Transactions on Semiconductor Manufacturing (2012)
- ASQ overview of the eight disciplines (8D) problem solving method
- SK hynix on AI in fab operations (September 2026)